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Preliminary W24100 128K x 8 CMOS STATIC RAM
GENERAL DESCRIPTION
The W24100 is a normal-speed, very low-power CMOS static RAM organized as 131072 x 8 bits that operates on a single 5-volt power supply. This device is manufactured using Winbond's high performance CMOS technology.
FEATURES
* * * * * *
Low power consumption: - Active: 385 mW (max.) Access time: 70 nS Single 5V power supply Fully static operation All inputs and outputs directly TTL compatible Three-state outputs
* * *
Battery back-up operation capability Data retention voltage: 2V (min.) Packaged in 32-pin 600 mil DIP, 450 mil SOP, standard type one TSOP (8 mm x 20 mm) and small type one TSOP (8 mm x 13.4 mm)
PIN CONFIGURATIONS
BLOCK DIAGRAM
CLK GEN. A16 PRECHARGE CKT.
NC A16 A14 A12 A7 A6 A5 A4 A3 A2 A1 A0 I/O1 I/O2 I/O3 VSS
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
32 31 30 29 28 27 26
VDD A15 CS2 WE A13 A8 A9 A11 OE A10 CS1 I/O 8 I/O 7 I/O 6 I/O5 I/O4
A14 A12 A4 A3 A2 A7 A6 A5 A9 I/O1 : I/O8 DATA CNTRL. CLK GEN. WE CS1 CS2 OE A15 A13 A8 A1 A0 A11A10 I/O CKT. COLUMN DECODER D E C O D E R R O W
CORE CELL ARRAY 1024 ROWS 128 X 8 COLUMNS
32-pin SOP
25 24 23 22 21 20 19 18 17
PIN DESCRIPTION
SYMBOL A0-A16 I/O1-I/O8 CS1, CS2 WE OE VDD VSS NC DESCRIPTION Address Inputs Data Inputs/Outputs Chip Select Input Write Enable Input Output Enable Input Power Supply Ground No Connection
A11 A9 A8 A13 WE CS2 A15 V DD NC A16 A14 A12 A7 A6 A5 A4
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
32-pin TSOP
32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17
OE A10 CS1 I/O8 I/O7 I/O6 I/O5 I/O4 VSS I/O3 I/O2 I/O1 A0 A1 A2 A3
-1-
Publication Release Date: October 1999 Revision A1
Preliminary W24100
TRUTH TABLE
CS1 H X
CS2 X L H H H
OE X X
WE X X
MODE Not Selected Not Selected Output Disable Read Write
L L L
H L X
H H L
I/O1-I/O8 High Z High Z High Z Data Out Data In
VDD CURRENT ISB, ISB1 ISB, ISB1 IDD IDD IDD
DC CHARACTERISTICS
Absolute Maximum Ratings
PARAMETER Supply Voltage to VSS Potential Input/Output to VSS Potential Allowable Power Dissipation Storage Temperature Operating Temperature RATING -0.5 to +7.0 -0.5 to VDD +0.5 1.0 -65 to +150 0 to 70 UNIT V V W C C
Note: Exposure to conditions beyond those listed under Absolute Maximum Ratings may adversely affect the life and reliability of the device.
Operating Characteristics
(VDD = 5V 10%; VSS = 0V; TA = 0 C to 70 C)
PARAMETER Input Low Voltage Input High Voltage Input Leakage Current Output Leakage Current
SYM. VIL VIH ILI ILO
TEST CONDITIONS VIN = VSS to VDD VI/O = VSS to VDD, CS1 = VIH (min.) or OE = VIH (min.) or WE = VIL (max.) IOL = +2.1 mA IOH = -1.0 mA
CS1 = VIL (max.) and CS2 = VIH (min.), I/O = 0 mA Cycle = min., Duty = 100%
MIN. -0.5 +2.2 -1 -1
TYP.* -
MAX. +0.8 VDD +0.5 +1 +1
UNIT V V A A
Output Low Voltage Output High Voltage Operating Power Supply Current Standby Power Supply Current
VOL VOH IDD
2.4 -
-
0.4 70
V V mA
ISB ISB1
CS = VIH (min.), Cycle = min. Duty = 100% LL CS1 VDD -0.2V or CS2 0.2V L
-
-
3 50
mA A
-
100
Note: Typical parameter is measured under ambient temperature TA = 25 C and VDD = 5V.
-2-
Preliminary W24100
CAPACITANCE
(VDD = 5 V, TA = 25 C, f = 1 MHz)
PARAMETER Input Capacitance Input/Output Capacitance
SYM. CIN CI/O
CONDITIONS VIN = 0V VOUT = 0V
MAX. 6 8
UNIT pF pF
Note: These parameters are sampled but not 100% tested.
AC CHARACTERISTICS
AC Test Conditions
PARAMETER Input Pulse Levels Input Rise and Fall Times Input and Output Timing Reference Level Output Load 0V to 3.0V 5 nS 1.5V See the drawing below CONDITIONS
AC Test Loads and Waveform
1 TTL OUTPUT 100 pF Including Jig and Scope OUTPUT
1 TTL
5 pF Including Jig and Scope (For TCLZ, TOLZ, TCHZ, TOHZ, TWHZ, TOW )
3.0V 0V 5 nS
90% 10%
90% 10% 5 nS
-3-
Publication Release Date: October 1999 Revision A1
Preliminary W24100
AC Characteristics, continued (VDD = 5V 10%; VSS = 0V; TA = 0 C to 70 C)
Read Cycle
PARAMETER SYM. W24100-70L MIN. Read Cycle Time Address Access Time Chip Select Access Time Output Enable to Output Valid Chip Selection to Output in Low Z Output Enable to Output in Low Z Chip Deselection to Output in High Z Output Disable to Output in High Z Output Hold from Address Change
These parameters are sampled but not 100% tested
W24100-70LL MIN. 70 10 5 10 MAX. 70 70 35 30 30 -
UNIT
MAX. 70 70 35 30 30 -
TRC TAA TACS TAOE TCLZ* TOLZ* TCHZ* TOHZ* TOH
70 10 5 10
nS nS nS nS nS nS nS nS nS
Write Cycle
PARAMETER SYM. W24100-70L MIN. Write Cycle Time Chip Selection to End of Write Address Valid to End of Write Address Setup Time Write Pulse Width Write Recovery Time
CS1, CS2, WE
W24100-70LL MIN. 70 50 50 0 50 0 30 0 5 MAX. 25 25 -
UNIT
MAX. 25 25 -
TWC TCW TAW TAS TWP TWR TDW TDH TWHZ* TOHZ* TOW
70 50 50 0 50 0 30 0 5
nS nS nS nS nS nS nS nS nS nS nS
Data Valid to End of Write Data Hold from End of Write Write to Output in High Z Output Disable to Output in High Z Output Active from End of Write These parameters are sampled but not 100% tested
-4-
Preliminary W24100
TIMING WAVEFORMS
Read Cycle 1
(Address Controlled)
TRC Address TOH DOUT TAA TOH
Read Cycle 2
(Chip Select Controlled)
CS1
CS2 TACS TCLZ DOUT TCHZ
Read Cycle 3
(Output Enable Controlled)
T RC Address TAA OE TAOE TOLZ CS1 T OH
CS2
TACS D OUT TCLZ
T CHZ
T OHZ
-5-
Publication Release Date: October 1999 Revision A1
Preliminary W24100
Timing Waveforms, continued
Write Cycle 1
TWC Address TWR OE
TCW CS1
CS2 TAW WE TAS TOHZ D OUT T DW DIN TDH (1, 4) TWP
Write Cycle 2
(OE = VIL Fixed)
TWC Address TCW CS1 TWR
CS2 TAW WE TAS T WP TWHZ (1, 4) TOH (2) TOW (3)
D OUT
TDW DIN
TDH
Notes: 1. During this period, I/O pins are in the output state, so input signals of opposite phase to the outputs should not be applied. 2. The data output from DOUT are the same as the data written to DIN during the write cycle. 3. DOUT provides the read data for the next address. 4. Transition is measured 500 mV from steady state with CL = 5 pF. This parameter is guaranteed but not 100% tested.
-6-
Preliminary W24100
DATA RETENTION CHARACTERISTICS
(TA = 0 C to 70 C)
PARAMETER VDD for Data Retention Data Retention Current Chip Deselect to Data Retention Time Operation Recovery Time * Read Cycle Time
SYM. VDR IDDDR TCDR TR
TEST CONDITIONS CS VDD -0.2V CS VDD -0.2V, VDD = 3V See data retention waveform
MIN. 2.0 0 TRC*
TYP. MAX. UNIT 50 V A nS nS
DATA RETENTION WAVEFORM
VDD
0.9 V DD TCDR
> VDR = 2V
0.9 V DD TR
CS1
CS > V DD - 0.2V =
CS2
-7-
Publication Release Date: October 1999 Revision A1
Preliminary W24100
ORDERING INFORMATION
PART NO. ACCESS TIME (nS) 70 70 70 70 70 70 70 70 OPERATING CURRENT MAX. (mA) 70 70 70 70 70 70 70 70 STANDBY CURRENT MAX. (A) 100 50 100 50 100 50 100 50 PACKAGE
W24100-70L W24100-70LL W24100S-70L W24100S-70LL W24100T-70L W24100T-70LL W24100Q-70L W24100Q-70LL
600 mil DIP 600 mil DIP 450 mil SOP 450 mil SOP Standard type one TSOP Standard type one TSOP Small type one TSOP Small type one TSOP
Notes: 1. Winbond reserves the right to make changes to its products without prior notice. 2. Purchasers are responsible for performing appropriate quality assurance testing on products intended for use in applications where personal injury might occur as a consequence of product failure.
-8-
Preliminary W24100
PACKAGE DIMENSIONS
32-pin P-DIP
Dimension in inches
Dimension in mm
Symbol
Min. Nom. Max. Min. Nom. Max.
0.210 0.010 0.150 0.016 0.048 0.008 0.155 0.018 0.050 0.010 1.650 0.590 0.545 0.090 0.120 0 0.630 0.650 0.600 0.550 0.100 0.130 0.160 0.022 0.054 0.014 1.660 0.610 0.555 0.110 0.140 15 0.670 0.085 14.99 13.84 2.29 3.05 0 16.00 16.51 0.25 3.81 0.41 1.22 0.20 3.94 0.46 1.27 0.25 41.91 15.24 13.97 2.54 3.30 4.06 0.56 1.37 0.36 42.16 15.49 14.10 2.79 3.56 15 17.02 2.16 5.33
D
32 17
E1
A A1 A2 B B1 c D E E1 e1 L
a
1
16
eA S Notes:
E c
S
A A2
A1
Base Plane Seating Plane
L B B1
e1
a
eA
1. Dimensions D Max. & S include mold flash or tie bar burrs. 2. Dimension E1 does not include interlead flash. 3. Dimensions D & E1 include mold mismatch and are determined at the mold parting line. 4. Dimension B1 does not include dambar protrusion/intrusion. 5. Controlling dimension: Inches 6. General appearance spec. should be based on final visual inspection spec.
32-pin SOP Wide Body
Symbol
17
Dimension in Inches
Dimension in mm
Min.
32
Nom.
Max.
0.118
Min.
0.10
Nom.
Max.
3.00
e1
E HE
L
Detail F
1
b
16
A A1 A2 b c D E e HE L LE S y
0.004 0.101 0.014 0.006 0.106 0.016 0.008 0.805 0.440 0.044 0.546 0.023 0.047 0.445 0.050 0.556 0.031 0.055 0.111 0.020 0.012 0.817 0.450 0.056 0.556 0.039 0.063 0.036 0.004 0 10
2.57 0.36 0.15
2.69 0.41 0.20 20.45
2.82 0.51 0.31 20.75 11.43 1.42 14.38 0.99 1.60 0.91 0.10
11.18 1.12 13.87 0.58 1.19
11.30 1.27 14.12 0.79 1.40
Notes:
D e1 c A2 S y e A1 LE A
0
10
1. Dimensions D Max. & S include mold flash or tie bar burrs. 2. Dimension b does not include dambar protrusion/intrusion. 3. Dimensions D & E include mold mismatch . and determined at the mold parting line. 4. Controlling dimension: Inches 5. General appearance spec should be based on final visual inspection spec.
See Detail F
Seating Plane
-9-
Publication Release Date: October 1999 Revision A1
Preliminary W24100
Package Dimensions, continued
32-pin Standard Type One TSOP
HD
Symbol
Dimension in Inches Min. Nom. Max. 0.047 0.002 0.037 0.007
Dimension in mm Min. Nom. Max. 1.20 0.15 1.05 0.23 0.17 18.50 8.10 20.20
D c 1
A A1 A2 b
__
__ __
0.039 0.008 0.006 0.041 0.009 0.007
__
0.05 0.95 0.17 0.12
__ __
1.00 0.20 0.15
M
e E
c D E HD e L L1
0.005 0.006 0.720 0.724 0.311 0.780 0.315
0.10(0.004)
0.728 18.30 18.40 0.319 7.90 8.00
b
0.787 0.795 19.80 20.00 0.020 0.020 0.031
__
0.016
__
0.024
__
0.50 0.40 0.50 0.80
__
0.60
__
0.000 1
__
0.004 5
__
0.00 1
__
0.10 5
A A2 L L1 A1
Y Y
__
3
__
3
Controlling dimension: Millimeters
32-pin Small Type One TSOP
HD
Symbol
Dimension in Inches Min. Nom. Max. 0.049 0.002
Dimension in mm Min. Nom. Max. 1.25 0.15 1.00 0.20 0.15 1.05 0.27 0.16
D c
1
A A1 A2 b c D E HD e L L1
0.006 0.05 0.95 0.17
e
E
0.037 0.039 0.041 0.007 0.008 0.009
0.0056 0.0059 0.0062 0.14 0.461
b
0.465 0.469 11.70 11.80 11.90 7.90 8.00 8.10
0.311 0.315 0.319
0.520 0.528 0.536 13.20 13.40 13.60 0.020 0.012 0.020 0.028 0.027 0.000 0 3 0.004 5 0.30 0.675 0.00 0 3 0.10 5 0.50 0.50 0.70
A2 A
L L1
A1
Y
Y
Controlling dimension: Millimeters
- 10 -
Preliminary W24100
VERSION HISTORY
VERSION A1 DATE Oct. 1999 PAGE Initial Issued DESCRIPTION
Headquarters
Winbond Electronics (H.K.) Ltd.
Rm. 803, World Trade Square, Tower II, No. 4, Creation Rd. III, 123 Hoi Bun Rd., Kwun Tong, Science-Based Industrial Park, Kowloon, Hong Kong Hsinchu, Taiwan TEL: 852-27513100 TEL: 886-3-5770066 FAX: 852-27552064 FAX: 886-3-5796096 http://www.winbond.com.tw/ Voice & Fax-on-demand: 886-2-27197006
Winbond Electronics North America Corp. Winbond Memory Lab. Winbond Microelectronics Corp. Winbond Systems Lab.
2727 N. First Street, San Jose, CA 95134, U.S.A. TEL: 408-9436666 FAX: 408-5441798
Taipei Office
11F, No. 115, Sec. 3, Min-Sheng East Rd., Taipei, Taiwan TEL: 886-2-27190505 FAX: 886-2-27197502
Note: All data and specifications are subject to change without notice.
- 11 -
Publication Release Date: October 1999 Revision A1

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